1. Technical Field
The present invention relates to a semiconductor integrated circuit, and more particularly, to an address delay circuit of a semiconductor memory apparatus.
2. Related Art
In general, an address delay circuit of a semiconductor memory apparatus delays an external address received from the outside of the semiconductor memory apparatus and outputs an internal address.
FIG. 1 is a diagram illustrating an address delay circuit 16 of a known semiconductor memory apparatus, which illustrates an example in which three external addresses Address<0:2> are output as three internal addresses Address_dl<0:2> after five cycles of a clock CLK pass.
Referring to FIG. 1, the address delay circuit 16 of the general semiconductor memory apparatus includes first, second, . . . , and fifteenth flip-flops 1, 2, . . . , and 15.
The first, second, . . . , and fifth flip-flops 1, 2, . . . , and 5 are serially connected to one another. The first flip-flop 1 receives a first external address Address<0> and the fifth flip-flop 5 outputs a first internal address Address_dl<0>.
The sixth, seventh, . . . , and tenth flip-flops 6, 7, . . . , and 10 are serially connected to one another. The sixth flip-flop 6 receives a second external address Address<1> and the tenth flip-flop 10 outputs a second internal address Address_dl<1>.
The eleventh, twelfth, . . . , and fifteenth flip-flops 11, 12, . . . , and 15 are serially connected to one another. The eleventh flip-flop 11 receives a third external address Address<2> and the fifteenth flip-flop 15 outputs a third internal address Address_dl<2>.
Each of the first, second, . . . , and fifteenth flip-flops 1, 2, . . . , and 15 performs input, storage, and output operations in response to the clock CLK, respectively.
Referring to FIG. 1, the address delay circuit 16 of the known semiconductor memory apparatus requires a plurality of flip-flops serially connected one another in order to delay one external address to output one internal address. In detail, the flip-flops serially connected one another, which correspond to the number of clock cycles, are required according to a delay time, that is, cycles of a clock to be delayed. Therefore, with an increase in the number of external addresses of a semiconductor memory apparatus and a delay time, since a large number of flip-flops are required, an area of an address delay circuit may increase and current consumption may also increase.